This invention relates to a method of calculating capacitance parameters in an equivalent circuit model of a metal oxide semiconductor field effect transistor (MOSFET), and in particular, to a method of calculating the capacitance parameters in the equivalent circuit model of the MOSFET that fits for Y parameter data.
In the manner known in the art, the method of calculating the capacitance parameters in the equivalent circuit model of the type described is widely performed to evaluate a designed device or to carrying out a circuit simulation or a delay simulation on the designed device.
For instance, there is, as a most simplified method of calculating the capacitance parameters in the equivalent circuit model for the MOSFET, a method of measuring and calculating the capacitance parameters by using a C-V meter which is widely used in a high-frequency estimation of an electronic circuit. A first conventional method comprises the steps of connecting terminals of the MOSFET of a measured target to measurement terminals of the C-V meter, of measuring values of C and Q before and after a resonance state, respectively, and of calculating an impedance between the terminals of the MOSFET of the measured target from those measured values. In this event, the first conventional method comprises further the steps of measuring the values of C and Q by a combination of connections for a gate terminal, a drain terminal, a source terminal, and a substrate terminal of the MOSFET between the measurement terminals of the C-V meter, of solving a simultaneous equation including capacitance parameters in the equivalent circuit model of the MOSFET by corresponding the combination of terminal connections, and of calculating values of individual capacitance parameters.
In addition, there is, as another method, a second conventional method which comprises the steps of calculating S parameter data of a scattering matrix from transparence and reflection data at a high-frequency region measured with the MOSFET having a gate terminal input and a drain terminal output regarded as a two-terminal pair circuit, of converting the S parameter data into Y parameter data of an admittance matrix, and of calculating the capacitance parameters in the equivalent circuit model so as fit for the Y parameter data, in the manner which will later be described in conjunction with FIG. 1.
In the second conventional method, a relationship equation of the Y parameters in the two-terminal pair circuit and each equality of a real part and an imaginary part of the Y parameter data are simultaneous equations including parameters of the equivalent circuit model, respectively, and individual values of the parameters are calculated by solving the simultaneous equations. In this event, genuine capacitance parameters in an original equivalent circuit model of the MOSFET are calculated with high precision at a high operational frequency as well by manufacturing and measuring a dummy FET different from the MOSFET by a little to calculate S parameter date caused by parasitic capacitance parameters and by converting the S parameter data into Y parameter data with the parasitic capacitance parameters removed from the S parameter data calculated by measurement of the MOSFET, as described in, for example, Japanese Unexamined Patent Publication of Tokkai No. Hei 3-105,268 or JP-A 3-105268.
In addition, in the second conventional method, in a case of a measurement condition of measuring by applying a gate terminal of the MOSFET with a bias voltage which is not more than a threshold value, a voltage between a channel and a gate, a voltage between the channel and a substrate gate, and a current source corresponding to a mutual conductance can be zero to be remove from a two-terminal pair circuit, a relational expression of the Y parameter in the two-terminal pair circuit, and the capacitance parameters in the equivalent circuit model of the MOSFET are calculated.
In recent years, for purposes of high-speed of a large-scale integrated circuit or an LSI circuit, progression will directed to make a gate oxide film of the MOSFET a thin film. However, in the MOSFET having a gate length of 90 nanometers or less, a gate leakage component due to a tunnel current of the gate oxide film occurs and an affect of a gate electrode resistor corresponding to a film thickness of a gate electrode film connected to a gate terminal are not neglected on designing a device.
It is necessary for the gate electrode film and the gate oxide film of the MOSFET to set a CGR equivalent circuit model where the gate electrode resistor corresponding to the film thickness of the gate electrode film and a gate capacitor and a tunnel conductance which correspond to a film thickness of the gate oxide film are connected in series, in the manner which will later be described in conjunction with FIG. 2.
The method of calculating the capacitance parameters using the C-V meter is suitable to measurement of a relatively high impedance or a very low impedance because a principal using the resonance state of the circuit in the manner which is described above. However, the method of calculating the capacitance parameters using the C-V meter is disadvantageous in that it is difficult to carry out device evaluation having high reliability for measurement of impedance where the tunnel conductance corresponding to the gate leakage component is connected in parallel to the gate capacitor having a small value and is connected in series to the gate electrode resistor as the above-mentioned CGR equivalent circuit model. This is because measurement sensitivity is reduced and reliability of measured values is low in the measurement of such as impedance.
In addition, the method of calculating the capacitance parameters so as to fit for the Y parameter data is a method of solving the simultaneous equation corresponding to the real part and the imaginary part of the relational expression for the Y parameters of the two-terminal pair circuit and of calculating the respective values of the parameters in the manner which is described above. In general, the relational expression for the Y parameters of the two-terminal pair circuit becomes difficulty to solve the simultaneous equation when the number of parameters of series and parallel connections of the equivalent circuit model increases because reciprocal processings increase and the relational expression becomes a complex expression of a high order.
In the manner which is described above, in a case where it is impossible to ignore the tunnel conductance corresponding to the film thickness of the gate oxide film, it is therefore to ignore the gate electrode resistor corresponding to the film thickness of the gate electrode film also, and the gate capacitor and the tunnel conductance are connected in parallel between the gate electrode resistor and another electrode resistor, respectively, the second conventional method is generally disadvantageous in that it is difficult to solve the simultaneous equation and it is also difficult to calculate the capacitance parameters because an increase of the number of the parameters in the series-parallel connection.